Hello,
I have layed out a board in Eagle pro, and wish to run a design rule check so as to ensure that different-net copper tracks/pads are more than 0.3mm apart from each other. The problem is that the microcontroller and opamps, and the pwm controller ICs have pad to pad clearances of just 0.2mm since they are very fine pitch components. How do I run the design rule check so that it ignores the pad to pad spacings, but still checks the track to track spacings elsewhere on the board?
At the moment, the design rule check is absolutely cluttered with clearance violations in and around the fine pitch ICs. Can I run a design rule check on for example a restricted highlighted area of the board, ie an area on which there are no fine pitch ICs.?
Please find the board file attached. Eagle from cadsoft.de has a free viewer for download from its website.