design of the three stage comparator

Status
Not open for further replies.
P

puush

Newbie level 5
Joined
Feb 19, 2013
Messages
9
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Visit site
Activity points
1,355
I have question on ic design methodology. I read several book on how to design circuits or systems. the book explained on basic methodology that i need to follow. the question is, let say my project in 0.18micro technology, how to get all cmos parameters like µ, λ, Vth, Φ and etc. Right now, I just randomly change the W and L and check the simulation result. For your information, I am doing the project using cadence using spectre bsimv3........... can you send me the specifications????
 

It is always best if you calculate these values on your own. You can follow the following steps.

1. Do a dc operating point simulation of a NMOS and PMOS with different Vgs and Vds.
2. Find out Id and Vth of both transistors from the operating point solution.
3. Use the equation Id = 0.5µnCox(W/L)(Vgs - Vth)2 and calculate µnCox.
4. Try this out for different values of W/L, Vgs and Vds.
5. With more values you can also find out λ (Channel length modulation parameter).
6. If you are interested, you can plot the Id vs Vgs curve by doing a dc sweep. You can then use curve fitting techniques to find out what is the whether the square law holds true. I have seen that for L = 0.18µm, the equation has a power of 1.32.
 


thankyou... so much
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…