design of buffer amplifier

[bharathr87]

buffer amplifier

To design a unity gain cmos buffer amplifier(for 45nm technology):

Band Gap Reference (BGR) Input: 1.2+_50 mV (+_ means plus or minus)
Output: BGR+_10V
Cload=3.5pF or higher
Iload(current load) 50uA
Vdd=3.3V+_300mV
Idc<100uA
PSRR>60dB
FREQ:1MHz
Temp:-45 to 125 degree C

 

[kishore2k4]

how to design a buffer amplifier

Since you won't be needing a high output swing you can go for a single stage telescopic cascode differential amplifier that will give you a decent gain with good PSRR and low power consumption. The main problem with this is the systemic offset which may or may not meet your spec of BGR+10mV.

Alternatively you can go for a typical differential amplifier(folded cascode or balanced diode-loads) with a second gain stage which will reduce your PSRR and also increase your power consumption.

Also there are many variations you can try out with the basic building blocks and pick the one that suits your specs the most. You can also look into other techniques like gain boosting etc.

Your VDD is quite high for a 45nm process, are you using output transistors or some other high voltage tolerant transistors?

 

[bharathr87]

use a diff. amp with a current mirror as the first stage n a pmos CS as the second stage and provide a negative feedback from the 2nd stage to the 1st