Design issue relate to breakdown voltage.

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wdd

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Now I design a circuit of mixed signal. Power supply is 9v, the analog parts use BJTs, but digital parts prefer to CMOS. Then the issue is that the MOS part is not free from supply voltage.
Can you give me some suggestions?
Thanks and Best Regards.
 

Use a down regulator to provide low DC voltage supply for CMOS part.
 

You can use multi. supply voltage, too
 

design a reference for the digital.
 

use bandgap and OP to make a regulator, then you can get a stable, low
noise voltage supply. you can get high PSSR


double voltage supply is not a good choice i think
 

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