Design Differential Ring VCO

[LiaoJJ]

Hi,
I'm now researching and design Maneatis VCO with 5 stages. But for some corner and vctrl, the VCO output swing will fail(see waveform), and I have tested the ac simulation like the diagram, the PM and gain can't see any stability issue.
How to fix the problem, can someone give me suggestion, Thanks!!!

 

[dick_freebird]

First, "fail, how?"

There are ways for a perfectly good circuit to
fail in simulation and vice versa.

Corners with low DC gain (as any diode-loaded
diff pair, let alone one at a gain-impairing corner)
might well "hang up" mid-rail at a DC solution
which meets numerical criteria yet is unlikely or
impossible to encounter in reality.

But your bias block could be an actor if it has
more than one stable state (many have at least
two, and you don't want the others).

Now is debug time, and your detective skillz
are what's tested. While you are waiting for
answers, you can work on formulating useful
questions that would "cut away" the potential
causes, leaving the real.

 

[LiaoJJ]

First, "fail, how?"

There are ways for a perfectly good circuit to
fail in simulation and vice versa.

Corners with low DC gain (as any diode-loaded
diff pair, let alone one at a gain-impairing corner)
might well "hang up" mid-rail at a DC solution
which meets numerical criteria yet is unlikely or
impossible to encounter in reality.

But your bias block could be an actor if it has
more than one stable state (many have at least
two, and you don't want the others).

Now is debug time, and your detective skillz
are what's tested. While you are waiting for
answers, you can work on formulating useful
questions that would "cut away" the potential
causes, leaving the real.

Thank you for your response.
It has been observed that the VCO failure occurs when Vctrl is relatively high.
A more specific question is: in the situation where the VCO fails, every transistor in the OP (folded cascode) of the half-bias is oscillating. Could you provide any relevant references discussing this issue or suggest any methods to ensure this situation does not occur? Thank you.

 

[dick_freebird]

Maybe you need to limit Vctrl, or improve the stages' response to it. Look for any non-monotonicity in the "whatever-vs-Vctrl" curves. Or just too little "go" for too much "gas".

At too much current you might lose amplitude in the loads more than you gain in the diff pair, increasing Vgs there eats range and so does raising tail current.