Design Compiler (Synopsys) -> Interview Questions

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ivlsi

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Hi All,

What questions might be asked in the interview for Synopsys Design Compiler Engineer (specially questions related to the flows)?

Thank you!
 

1. Difference between target/link libraries.
2.How to solve timing issues?
3.What are the different kinds of cells used?
4.Characteristics of H & LVT cells.
 

How to solve timing issues?
Click to expand...
Applying timing constraints, flat the design, logic cloning, rebalance registers/flops, usage of LVT & HVT libs...
What are other methods?
----------------------------------------------------------------------
What are the different kinds of cells used?
Click to expand...
Are you about LVT/HVT cells?
----------------------------------------------------------------------
4. Characteristics of H & LVT cells
Click to expand...
What are characteristics do they have?

Thank you!
 

For the 1st q above: 2 more methods are there:ask the tool to put higher effort and cell sizing.
2nd q: Yes
3rd qower,leakage current,fast vs slow...
 
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    ivlsi

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ask the tool to put higher effort and cell sizing
Click to expand...
Can DC-T decide on the cells size?
What commands should be used?
 

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