Xiyue Xiang
Newbie level 1
![Newbie level 1](/styles/images/ranks/alevel1.gif)
Hi,
I am synthesizing RTL code using DC compiler. The power report is as
Cell Internal Power = 4.6817 mW (99%)
Net Switching Power = 29.2688 uW (1%)
---------
Total Dynamic Power = 4.7110 mW (100%)
Cell Leakage Power = 17.1678 uW
I have two questions.
1) Why the leakage is so small? I am using 45nm technology. Leakage should be about >30%. I set toggling rate to be 0.1.
2) What does "cell leakage power" mean? Leakage per cell?
Thanks.
I am synthesizing RTL code using DC compiler. The power report is as
Cell Internal Power = 4.6817 mW (99%)
Net Switching Power = 29.2688 uW (1%)
---------
Total Dynamic Power = 4.7110 mW (100%)
Cell Leakage Power = 17.1678 uW
I have two questions.
1) Why the leakage is so small? I am using 45nm technology. Leakage should be about >30%. I set toggling rate to be 0.1.
2) What does "cell leakage power" mean? Leakage per cell?
Thanks.