Jordon
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hi, i am tring to compile a sram module from sky company, but the RTL codes has two clk(i dont know how to describe this situation), like the picture below, it has both posedge and negedge clk's always block,
i compile as normal, same as the design with one clk edge, but it seems the tools think it has one edge clk:
how can i change the command or what should I add in the tcl?
i compile as normal, same as the design with one clk edge, but it seems the tools think it has one edge clk:
how can i change the command or what should I add in the tcl?