[SOLVED] Delta Vbe current mirror and BJT question

[AMSA84]

Hi guys,

I am designing a delta vbe current reference with a PTAT and CTAT current current references that will be summed out.

The question I want to ask is the following: Since the CTAT current reference has only 1 BJT and the PTAT current reference has 1 BJT + 8 BJT, can I use the same node from the 1 BJT voltage from the PTAT current reference into the 1 BJT CTAT current reference, instead of using one more BJT in that current reference (CTAT)? This way I would stay only with one matrix 3x3 and not with 3x3 + 1.

I don't know if there are some implications doing this.

Regards. Thanks in advance.

 

[erikl]

You shouldn't do this. Why? Because your original current ratio of 1:8 is gone, and I doubt it will be easy to get a good compensation.

If yo want to stay with a 3x3 array, you'd better reduce the 1:8 ratio to a 1:7 ratio. Remember you can use any ratio, just the relation between lnA (A=ratio) and the resistor ratio must be correct.

 

[dick_freebird]

If you mean hanging another base off the {1X, 8X+res} base
node, I think the question becomes about the excess base
current, where it comes from and what it costs (e.g. more
curvature / low temp deflection). Without a schematic to
look at I can only speculate broadly.

Since references only are used 1X or few-X per chip, is
optimizing layout area and array size really a big deal?
It's not like squeezing square microns out of a DFF that's
going to be used thousands of times. I think this is more
about quality of the reference than gross area etc. And
what specifically is wrong about a 4x4, 1:14+1 array
other than square microns again? More local current gain is
not often a bad idea, helping some with PSRR and startup.

 

[AMSA84]

Okay, thanks guys.