[SOLVED] Delta-Sigma ADC Summing Node

[ashrafsazid]

Hi,

Can anybody please suggest me how to implement this block diagram using Capacitors? I tried but messed up because when I try with one gain coefficient, it changes the already calculated capacitance for other branch.



Thanks

 

[pancho_hideboo]

1+1.1+0.5=2.6
You have to scale down.

a1=1/2.6
a2=1.1/2.6
a3=0.5/2.6

Assume Ctotal=C1+C2+C3=100fF
C1/Ctotal=a1
C2/Ctotal=a2
C3/Ctotal=a3

After summation, you have to compensation of scale down.
This is done by adjusting quantizer.

If you use 1bit comparator, compensation is not needed.

 

[ashrafsazid]

Hi Pancho,

Thanks for your reply. Is the final configuration of this adder will be like this?

 

[pancho_hideboo]

Wrong.
Don't place Ctotal.

 

[ashrafsazid]

So is it like this only? as this following figure shows? Can you please give me some theoretical reference about this summer?

 

[pancho_hideboo]

So is it like this only? as this following figure shows?

Correct.

Can you please give me some theoretical reference about this summer?

Consider simple voltage division.

Assume G1, G2, G3 instead of C1, C2, C3.
Vout=(G1*Vin1+G2*Vin2+G3*Vin3)/(G1+G2+G3)

Next replace G1, G2, G3 with s*C1, s*C2, s*C3.
Here s means Laplace operator.

Vout=(C1*Vin1+C2*Vin2+C3*Vin3)/(C1+C2+C3)=a1*Vin1+a2*Vin2+a3*Vin3

a1=C1/Ctotal
a2=C2/Ctotal
a3=C3/Ctotal
Ctotal=C1+C2+C3

If you would like to care about parasitic capacitance, add Cparasitic to summation node.
Ctotal=C1+C2+C3+Cparasitic

You have to understand capacitance summation requires charge and discharge using by swicth.