Delay probem in Quartus

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sabkumar.r

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I am using Quartus II version 9.1. I simulated the following code

`timescale 1 ns / 1 ps
module clk_gen(output reg clk);
initial
clk=0;
always
#2 clk = ~clk;
endmodule

I was expecting a clock waveform of period 4ns. But to my surprise, the waveform I got was always high. Can someone please explain?
 

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