Re: Decoupling capacitor/s value vs effective frequency coverage & anti-resonance.
The important criteria in decoupling loads from affecting source ripple is the impedance ratio of load to source and rise time. If you convert rise time to frequency , the real ESR and reactive Zc and Zl of components and tracks can be compare to source, where decoupling caps of appropriate sizes help to lower source impedance to be 0.1-10 % of the load impedance, depending on the circuit's ripple effects.
Smaller size caps of same value have lower ESL, thus higher SRF, which is the lowest impedance or ESR of the chip.
It is needed close to pulsed loads of broad spectrum to reduce radiated loop current area.
Larger values provide for lower impedance in parallel with regulator source impedance, at lower frequencies and large pulse currents.
In the end, the transmission of load generated noise, is governed by this ESR+Zc impedance ratio of source/load that determines percentage of ripple expected.
Keep in mind Coss of Mosfets and CMOS is a switched load.
For source generated ripple LC impedance ratio offers good reduction, again looking at Zc/ZL ratio for spectral ripple, but LDO and band gap regulators offer the best impedance ratio due to buffered Zout being low until decoupling caps take over at high f.
best low ESR materials for GHz are mica and "plastic types" but limited to small values. "special ceramic exists for RF and not all are the same. Best are TDK,Murata and similar Japanese types.