mordak
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Hi,
I'm a bit unclear about a decimation filter used in oversampling data converters. Say in a delta sigma ADC that has a sampling frequency of 64 MHz, input frequency of 1 MHZ, oversampling equal to (64MHz/(2*1) = 32), and a 1-bit internal ADC, the resolution is supposed to be 20 bits. So there would be 64 samples at the output of the converter before decimation filter, but still resolution is too less. If decimation filter is employed, will we have only two 20-bit samples at the output of the decimation filter (considering only 64 samples at the input)?
Thanks!
I'm a bit unclear about a decimation filter used in oversampling data converters. Say in a delta sigma ADC that has a sampling frequency of 64 MHz, input frequency of 1 MHZ, oversampling equal to (64MHz/(2*1) = 32), and a 1-bit internal ADC, the resolution is supposed to be 20 bits. So there would be 64 samples at the output of the converter before decimation filter, but still resolution is too less. If decimation filter is employed, will we have only two 20-bit samples at the output of the decimation filter (considering only 64 samples at the input)?
Thanks!