[SOLVED] DDR4 Signals and its Reference Plane

[Vineeth_S]

Hello All,

I have a scenario that, My High speed signals(DDR4 - Add/Cmd/Cntrol/Clk and Data, DQS) are running in a sandwich planes, above layer is solid GND (reference plane) and the below layer I have two different power planes (other than from DDR supply) and all my signals crosses split in power plane.
My stack-up have higher dielectric constant(4.x)) to the above GND reference which will increase my coupling to my signal layer, and also less dielectric constant(3.x)) to the below power plane.

--------- GND
--------- DDR4 Signals
---------PWR(two power planes, different from DDR supply)

Will this affect my DDR signals and will cause any coupling/ Integrity issue ?
Please help !

Thanks,
Vineeth Sankarakutty

 

[marce]

Yes, not a good stack up.
At least have a plane that has a DDR voltage on it.

 

[Vineeth_S]

Thanks Marce, Yeah, I doing it in same way, by swapping the DDR signal layer to other layer between DDR power.