ddr3 simulation ODT setting

[prashantmandhare]

hi

i am using micrel ddr3 and FPGA interface, i have query regarding ddr ODT setting.
Now i am using two ddr3 16bit each address and command lines are same for both ddr,
but data lines are independent.so can i adjust different ODT setting for each ddr if not why ?
i am using hyperlynx 8.1.1 for simulation.

Thanks