sweethomela8
Member level 4
I'm interfacing a FPGA memory controller point to point to a 512Mb DDR2 SDRAM.
What type of termination is needed on the address/DQ/we/cas/etc signals? The chip can clock up to 400mhz (800mhz ddr)
What type of termination is needed on the address/DQ/we/cas/etc signals? The chip can clock up to 400mhz (800mhz ddr)