DC optimize the output unused DFF?

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How to control DC optimize the output unused DFF in RTL or not?

In RTL, for readable reason, there's some reversed registers.
How to control the DC to optimize them or not?



Thanks in advance.
 

try donot use 'posedge' & 'negedge' for condition of always in rtl.
 

Sorry, maybe I do not show my question clearly.

Such in my design, I defined 16 registers reg[15:0].
But I only use reg[10:0], other is left as reversed.
I need keep it in my RTL code. But I hope to controll
DC to optimize. Get rid of them in netlist or not.
 


I believe DC can not do that,

what don't you make your code configurable using some parameter to control the number of bits. this is easier. or ?
 

This method is only for designer read and understand it easily
 

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