DC gain in gm/id method

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zaimang101

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If SR, DC gain, f(-3dB), load capacitance
It seems like that there is not clear direct relation between gm/Id vs. gmro since ro is just a part of gmro when gm is not determined
in differential input amplifier with current mirror load. the DC gain is gm1*(ro1|ro2), but I think it's not easy to descibe the gain using gm/id method.

Am I right?

How do you make sure spec of DC gain using gm/id method.

Thanks
 

In good approximation, the gain = gm/Id * VA , where VA is the Early Voltage, see this page from Binkley's textbook "Tradeoffs and Optimization in Analog CMOS Design":
 

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Hi erikl, thank you a lot. Does the book talk about the voltage biasing like cascode ckt and how to deal with ICMR and output swing ?
It seems a little different with EE214 handout of Murmman(design based on gm/id)
 

zaimang101 said:
Does the book talk about the voltage biasing like cascode ckt and how to deal with ICMR and output swing ?
Click to expand...
I can't tell you in details, but the book includes a lot of useful practical information and circuits. I'll append the Contents of the book below. Perhaps you can find what you're looking for. For me, this is the best book about practical dealing with the gm/Id method. Here you can LOOK INSIDE and read a few pages.


zaimang101 said:
It seems a little different with EE214 handout of Murmman(design based on gm/id)
Click to expand...
Yes, it's constructed a different way, better conceivable (for me). I wonder why Murmann didn't mention it in his References; it turned up earlier (2008) than the Jespers book, which is much more based on theory.
 

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Thanks for your elaborate reply. Do you point "The gmId Methodology, A Sizing tool for low-voltage analog CMOS circuits" for "Jespers book"?
 

zaimang101 said:
Do you point "The gmId Methodology, A Sizing tool for low-voltage analog CMOS circuits" for "Jespers book"?
Click to expand...

I bought it - and was a bit disappointed: for me too much theory - not enough practical stuff.
 
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