Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

DC-DC pmos models, thank you.

Status
Not open for further replies.

qwertyIC

Junior Member level 2
Junior Member level 2
Joined
Dec 6, 2006
Messages
20
Helped
3
Reputation
6
Reaction score
1
Trophy points
1,283
Activity points
1,405
In my buck DC-DC project, Power PMOS is bought and adpoted,that
s to say, only design controller. Add pmos model when Top simulation.
Now a question come on. In top simulation, SW signal time of rising match with test result (base on tapeout samples), but time of falling more than test result(simualtion:14ns, test result:7ns).
I think PMOS models isn't accurate. but which parameters do I change the models? relation
with schottky? By the way, I think PMOS Ciss model isn't accurate,but rising time can match?
Thanks you very much
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top