AMSA84
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Hi guys,
Can someone who have designed an integrated DC-DC converter or have experience with those type of converters, like the buck converter, tell me if it is normal to not have gate voltage in the NMOS transistor when running corners, say 3V @ 125ºC, during a step load?
Regards.
EDIT: I forgot to mention that the converter still regulating the desired output voltage.
Can someone who have designed an integrated DC-DC converter or have experience with those type of converters, like the buck converter, tell me if it is normal to not have gate voltage in the NMOS transistor when running corners, say 3V @ 125ºC, during a step load?
Regards.
EDIT: I forgot to mention that the converter still regulating the desired output voltage.