Feb 14, 2013 #1 P Prashanthanilm Full Member level 5 Joined Aug 24, 2012 Messages 302 Helped 36 Reputation 72 Reaction score 36 Trophy points 1,308 Activity points 2,950 Hi all, Please can anyone tell how to design D-latch with clock and async clear. The problem here is the output from aync clear should always be given to feedback to function properly. Thank you
Hi all, Please can anyone tell how to design D-latch with clock and async clear. The problem here is the output from aync clear should always be given to feedback to function properly. Thank you