I hope you are well. I encounter this term quite often but really does not have deep knowledge about it.
What does it mean to have cycle accurate model? Some people talk about cycle accurate RTL. What is the difference between RTL and cycle accurate RTL and why it is needed instead of general RTL?
If you could give me examples and point to some code, that would be really appreciated.
Using the original definition of RTL (See this earlier discussion), they mean the same thing. But RTL has come to mean any input to a synthesis tool. A cycle accurate model describes only what is needed on the clock edge boundary. Actually you only need model two behaviors- before the clock edge and after the clock edge, then repeat. In contrast, a pin-accurate model has all the necessary delays to account for physical level timing checks like setup and hold.
You may want to look at some SystemC tutorials where they talk about the difference between RTL and TLM modeling using loosely-time(LT) and approximately-timed modeling for comparison.
Cycle accurate means independently of the coding languages you have the same functionality will used the same numbers of clock cycle.
Then a C or systemC model cycle accurate, need the same number of clock as the rtl coding.
Then you could develop rapidly some architecture which could be used by the software designer to validate the architecture.