cupoftea
Advanced Member level 6
Hi,
When you lay out an SMPS, do you have cutouts in the ground plane beneath switching nodes in order to improve common mode EMC?..
.ie, to stop high frequency capacitive currents getting capacitively coupled into the ground plane?
I mean, with 4 layer, 1.6mm PCB, the centre core is usually 1mm thick, and the outer prepregs are 0.25mm thick...this means there is only 0.25mm
separation between top copper and layer 2 copper.
So if the ground plane is on layer 2, then it will be closely capacitively coupled to the top layer, and so will couple very well capacitively
to the top layer...and if that has the switching node on it...then we are talking big capacitive currents!
When you lay out an SMPS, do you have cutouts in the ground plane beneath switching nodes in order to improve common mode EMC?..
.ie, to stop high frequency capacitive currents getting capacitively coupled into the ground plane?
I mean, with 4 layer, 1.6mm PCB, the centre core is usually 1mm thick, and the outer prepregs are 0.25mm thick...this means there is only 0.25mm
separation between top copper and layer 2 copper.
So if the ground plane is on layer 2, then it will be closely capacitively coupled to the top layer, and so will couple very well capacitively
to the top layer...and if that has the switching node on it...then we are talking big capacitive currents!