I believe that it can be accessed with PL fine. Both PS and PL can access the DDRs.
Someone told me that when you write a 32-bit wide data to a specific address, 16-bits will get stored in one of the DDR dies, and the other 16-bit would get stored in the second DDR die !
To be more specific, he mentioned that Byte-0 and Byte-1 will get stored in one DDR, and Byte-2 and Byte-3 in the on DDR !
This makes intuitive sense, but is this how it gets stored for certain?
Will there be a way for me to verify this? Because I am afraid if try to read back from memory with the processor (in software), I will always get a 32-bit wide data back, since the processor only communicate with SDRAM on 32-bit wide boundary, correct?
So, could you recommend any method for verification?
Will there be anyway to temporarily disable one of the DDRs, and when I am reading back a 32-bit wide data, I would only see that 16-bit of this data is valid, which would correspond to either (Byte-0 & Byte-1), or (Byte-2, and Byte-3) !
Or, maybe there is an easier way to verify this, but I just cannot see it?
Thanks,
--Rudy