Alice Lee
Newbie level 6
Hi,everyone.
I'm designing a CT delta-sigma modulator. When i designing the feedback current steering DAC. There are some questions confuses me.
1. what's the design point of the swtich latch driver? the timming?
2. if the current steering unit dac is based on differential sw structure, the P-side output impedance should be well match with N-side impdedance , or just over a designed value,e.g.1 MΩ？
3. how to test the dynamic specification of a oversampling current steering DAC? generate ideal sine wave code by ideal ADC then feedback to DAC? should connected with a res or a integrator in CTDSM?
thank u.
I'm designing a CT delta-sigma modulator. When i designing the feedback current steering DAC. There are some questions confuses me.
1. what's the design point of the swtich latch driver? the timming?
2. if the current steering unit dac is based on differential sw structure, the P-side output impedance should be well match with N-side impdedance , or just over a designed value,e.g.1 MΩ？
3. how to test the dynamic specification of a oversampling current steering DAC? generate ideal sine wave code by ideal ADC then feedback to DAC? should connected with a res or a integrator in CTDSM?
thank u.