current mirror_cadence

kogi88 · Dec 26, 2012

If we need to bias different voltages in different places at mixer, anyone one can give any picture or idea how to design current mirror for that. Normally when designing mixer can place many current mirrors? since need to bias place different voltages i having problem in headroom voltage. i just beginner so far i only know to basic current mirror.
thank you.

nitishn5 · Dec 26, 2012

I think the following link should be helpful.
**broken link removed**

It gives various biasing circuits which provide the right voltage at the gate without the extra threshold voltage which comes with the basic current mirror which gives headroom issues.

To be in saturation the lowermost NMOS requires only Vth1 + Vov1 at the gate, The Cascode NMOS (NMOS in 2nd level of stack) requires only, Vds1 + Vth2 + Vov2. These techniques are explained in this link. It is also available in the Gray, Hurst, Meyer Book.

kogi88 · Dec 26, 2012

nitishn5 said:
I think the following link should be helpful.
**broken link removed**

It gives various biasing circuits which provide the right voltage at the gate without the extra threshold voltage which comes with the basic current mirror which gives headroom issues.

To be in saturation the lowermost NMOS requires only Vth1 + Vov1 at the gate, The Cascode NMOS (NMOS in 2nd level of stack) requires only, Vds1 + Vth2 + Vov2. These techniques are explained in this link. It is also available in the Gray, Hurst, Meyer Book.

Ok. Thank you. I look through everything first. It seem like good material and idea. One more doubt, some time in between the current mirror they placing high resistance. The function of those resistance?

nitishn5 · Dec 26, 2012

The resistances are in the current sources. That is to set the value of current. In the actual chip you would have to generate the current used to bias. A resistor with an appropriate value can do this. It also may have other functions such as to have a Temp/Voltage independent setup depending on the circuit. You may have to refer a textbook for deeper details. The book by Gray and Meyer explains a lot.

kogi88 · Dec 26, 2012

nitishn5 said:
The resistances are in the current sources. That is to set the value of current. In the actual chip you would have to generate the current used to bias. A resistor with an appropriate value can do this. It also may have other functions such as to have a Temp/Voltage independent setup depending on the circuit. You may have to refer a textbook for deeper details. The book by Gray and Meyer explains a lot.

Can u give the exact book name?

nitishn5 · Dec 26, 2012

https://www.flipkart.com/analysis-design-analog-integrated-circuits-8126521481/p/itmdytmwxjkpcrup?pid=9788126521487&ref=d0b42edf-3586-41f0-a5ad-30935f250aac&srno=s_1&otracker=from-search&query=gray%20meyer

kogi88 · Dec 27, 2012

Ii got read in one book, the writer mention that not necessary to maintain minimum length of transistor in order to get flat Id. anyone can explain this.

current mirror_cadence

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