1. Your array is probably too big for a single-line interdigitation pattern (the aspect ratio of the array would be too large which is bad for gradients);
2. Keep at least 2 fingers for each device;
3. Keep the same unit width for each transistor (use multipliers to achieve target total width);
My idea of device sizing and matching is attached. It's somewhere in between of common-centroid and interdigitation, but it passes the gradient test, so it should be okay. Consider using Layout GXL for faster device placement (you can enter your pattern there).
Good luck!
P.S. Even though the array looks massive, when you will stack the neighboring MOSFETs, I think it should be fine
View attachment 193102