[SOLVED] Current Carrying Capabilities of PMOS & NMOS and Ideal Load for Current-Mode Circuits

[pavan garate]

Current Carrying Capabilities of PMOS & NMOS and Ideal Load for Current-Mode Circuits

1) It's a well known fact that PMOS gives GOOD 1 & POOR 0, whereas, NMOS gives GOOD 0 & POOR 1. These 0 & 1 are defined in terms of voltages.

But what about the current carrying capabilities of PMOS & NMOS..? Which MOSFET will pass the maximum current entering through it..?

2) Normally, a ckt works in voltage-mode with Vss = Logic 0 & Vdd = Logic 1. The load connected to such ckt is a capacitive load.

Which load should be connected while simulating a current-mode ckt where the inputs & outputs are currents..?

These might be helpful while designing current-mode circuits, e.g. current mirror, current comparator, etc.

 

[dick_freebird]

Re: Current Carrying Capabilities of PMOS & NMOS and Ideal Load for Current-Mode Circ

Either one can be scaled to get you the on-resistance
you want. Assuming you're willing to pay for that die
size.

But on-resistance is not really related to current
carrying capacity directly. Especially in integrated circuits,
you are at liberty to ruin that by using too-skinny metal
to get the current in and out, or arrange it such that
current crowding causes early local failure (which will
likely ripple like dominoes).

Current-mode circuits tend to operate current-starved
or current-controlled, far below reliability and thermal
limits.

 

[pavan garate]

Re: Current Carrying Capabilities of PMOS & NMOS and Ideal Load for Current-Mode Circ

what about the load to be connected to current-mode circuits..??

 

[D.A.(Tony)Stewart]

Re: Current Carrying Capabilities of PMOS & NMOS and Ideal Load for Current-Mode Circ

What about it?

As long as load resistance is higher than the Rds ON minimum resistance MOSFETS work as voltage control resistance switches.

The current will depend on the total voltage / total resistance (of FET Rds and load.)

 

[pavan garate]

Re: Current Carrying Capabilities of PMOS & NMOS and Ideal Load for Current-Mode Circ

What about it?

As long as load resistance is higher than the Rds ON minimum resistance MOSFETS work as voltage control resistance switches.

The current will depend on the total voltage / total resistance (of FET Rds and load.)

Consider a fully ON PMOS & a fully ON NMOS. Which of them will offer the minimum resistance to the current passing through it?

Which MOSFET is better for using as "voltage control resistance switch" ?

 

[dick_freebird]

Re: Current Carrying Capabilities of PMOS & NMOS and Ideal Load for Current-Mode Circ

You're asking questions which seem to not relate to
anything.

Which has lower resistance? Neither. Until you start
to constrain die size, packaging style and cost. Then
the NMOS wins, but this irrelevant in most cases -
the voltage source and control polarity matter more.

Same is true for your "voltage controlled resistance
switch". A good switch is not operated as a controlled
resistance, other than that you drive it to minimum
or maximum. If you are making a vccs load then you
are not operating as a "switch" except at the endpoints.

 

[pavan garate]

Re: Current Carrying Capabilities of PMOS & NMOS and Ideal Load for Current-Mode Circ

You're asking questions which seem to not relate to
anything.

My questions are very straightforward. I'm asking 2 questions-
1) We know that PMOS acts as good pull-up device & NMOS acts as good pull-down device. Hence we use CMOS. Generally a capacitor is connected as a load to such CMOS circuit. We measure the charging & discharging times of the transistor, which we wish to be same. The PMOS charges the capacitor to Vdd & NMOS discharges it to Vss. We say that PMOS gives GOOD 1 but POOR 0 & NMOS gives GOOD 0 but POOR 1. This explains the "voltage carrying capabilities" of PMOS & NMOS.

I want to know about "current carrying capabilities" of PMOS & NMOS. For example, consider a single PMOS. If Vss is applied to its Gate, it will be ON & pass the current from source to drain (say Isdpon) through it. If Vdd is applied to its Gate, it will be OFF & will not pass any current or will pass very small current (say Isdpoff) through it. Similar cases for NMOS will give the drain to source currents Idsnon & Idsnoff.

My question is, out of Isdpon & Idsnon, which is maximum? Similarly, out of Isdpff & Idsnoff, which is minimum? And Why..??

2) For voltage-mode circuits, generally a capacitor is connected as a load during simulation. If charging & discharging times of capacitor are same, we consider that our circuit is good. Hence we can term a capacitor as a "suitable" load for voltage-mode circuits.

Is there any such "suitable" load for current-mode circuits? Various options can be Inductor, Resistor, Current Mirror, Current Sink Circuit, etc.

I can surely claim that a larger current-mode circuit can not run properly without a load connected at its output and sometimes output current varies with the load, making the output less reliable.



I also want to know about some good circuits for CCVS, VCCS & CCCS working properly at 90nm technology.

 

[dick_freebird]

Re: Current Carrying Capabilities of PMOS & NMOS and Ideal Load for Current-Mode Circ

Again, the relative drives and leakages can only be
pinned down when you specify constraints. You can
make either one "win" when you have liberty to size
the devices to suit. Constrained to equal geometry
and roughly equal VT, NMOS will win on drive strength.
Leakage comes down to processing with PMOS being
generally better-behaved and able to stand off more
voltage for the same channel length and drawn width,
but a little VT skew could make this different.

The capacitive "load" you keep referring to is not a
desired load, it's just something you can't escape,
and usually called out as a test condition more than
a desirable reality.

Current mode outputs need the current loop completed,
and within the compliance range of the driver circuit.
Short circuit to opposing rail is easy, low impedance /
virtual ground is good for characterization but if you
demand linearity then you have to measure multiple
voltage-points at a single current set-point, which is
not the province of simple passive loads.

 

[D.A.(Tony)Stewart]

Re: Current Carrying Capabilities of PMOS & NMOS and Ideal Load for Current-Mode Circ

Consider a fully ON PMOS & a fully ON NMOS. Which of them will offer the minimum resistance to the current passing through it?

Which MOSFET is better for using as "voltage control resistance switch" ?

The lowest RdsON switches are N type enhancement.
for example 0.5mOhm using Latest Trench Power AlphaMOS (αMOS LV) technology ... for < $1
http://www.aosmd.com/res/data_sheets/AON6500.pdf

But when you regulate with a large voltage drop, the thermal resistance becomes more important, which improves with SMT and large chips and the best heatsinks.