Creating a structure in RTL Compiler

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lannister7

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Thanks for helping me out with my previous question.

I'm having difficulty to create a structure in RTL compiler.

i m using the edit netlist command .

i need to create a structure with 4 ip ports, 1 drives a buffer pair which goes into a nand gate whose other input is port 2.

port 3 is the clock for the D flip flop whose D input is the output of the nand gate.

this drives another gate, whose other input is port 4.

there is one output port, called out.

How will i do this?
 

you should really look into the docs - there are quite verbose; BTW here is a one time go ahead; hope it helps

edit_netlist new_design -name top
edit_netlist new_port_bus -name in -left_bit 0 -right_bit 3 -input
edit_netlist new_port_bus -name out -left_bit 0 -right_bit 1 -output
edit_netlist new_instance -name buf1 <libcell> top
edit_netlist new_instance -name buf2 <libcell> top
edit_netlist connect buf1/Y buf2/A
edit_netlist new_instance -name nand1 <libcell> top
edit_netlist connect buf2/Y nand1/A
edit_netlist connect in1 nand1/B
edit_netlist connect in0 buf1/A
edit_netlist new_instance -name ff1 <libcell> top
edit_netlist connect in2 ff1/clk
edit_netlist connect nand1/Y ff1/d
 
Hey English Dogg,

Thanks for the quick help. it was a debugging issue and i never worked wit RC Compiler before, hence i did not know the work around for it. But now that u say, i will spend time reading the document thoroughly before i make any more posts regarding the doubts i have.

Once again, thanks for the guidance it helps noobs like me sail through this synthesis ocean !












 

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