Varun124
Junior Member level 3
Hi Team,
I have a design and i am using active low reset. To improve coverage i have set this reset to clock. But there are some reset path where top level reset goes to some combos and finally captured to D flip flop. To test the SA1 faults on these combos, the reset should be toggled. The tool is unable to toggle because of capture flop`s clock. Since we cant pulse two dependent clock same time, I am unable to detect these faults. Could someone help me how to detect these paths.
Also i have tried to make reset as 0 ie. during load_unload and preshift time i made it 1 and in teset_setup, capture procedure i set it to 0. But while do this i am seeing S32 violation
I have a design and i am using active low reset. To improve coverage i have set this reset to clock. But there are some reset path where top level reset goes to some combos and finally captured to D flip flop. To test the SA1 faults on these combos, the reset should be toggled. The tool is unable to toggle because of capture flop`s clock. Since we cant pulse two dependent clock same time, I am unable to detect these faults. Could someone help me how to detect these paths.
Also i have tried to make reset as 0 ie. during load_unload and preshift time i made it 1 and in teset_setup, capture procedure i set it to 0. But while do this i am seeing S32 violation
