Correlation Between Mismatch Error and Noise Power of SAR ADCs

[SafeIC]

Dear all, if we tune the bit weight of a SAR ADC, would it only affect the error power contributed by the capacitor mismatch? In other words, I guess it won't change the error power contributed by the circuit noise. However, I have not found materials discussing this directly. Any suggestions to this matter would be highly appreciated, thanks!

 

[timof]

Changing the bit weights (e.g. by parasitic C) will lead to increased INL and DNL.

 

[SafeIC]

Changing the bit weights (e.g. by parasitic C) will lead to increased INL and DNL.

Thank you for your reply. More specifically, when using LMS-based calibration methods, does the circuit noise affect the calibration results? Since the loop only aims to minimize the output mean-square-error, it may not tell whether or not this error comes from the circuit noise or the mismatch.