converting to fixed point number representation

[hani nik]

fixed point number representation

Hi.
I am writing an algorithm in Matlab which would eventually have to be implemented on FPGA. The numbers I use in Matlab are real numbers, positive and negative with up to 4 decimal points.

My question:
1.) Before I write the Verilog code, I assume I need to test the algorithm using fixed-point numbers in Matlab, right?

2.) the 'real numbers' in MATLAB... (I guess this is a silly question for all you experts out there but I am a newbie so thank you for bearing with this)... if I do a straight forward conversion of "dec2bin" in MATLAB, it would give me a floating point number, right? is there a straight forward way to convert real numbers to fixed-point Q15 format in Matlab?

3.) When implemented in FPGA later, at what stage will the conversion be done. i.e. does the number being fed to the board already have to be in the number format required or can the board settle that?

Thank you. Any advice is very much appreciated.

 

[kalyanram]

q-format representation

Hi,
Firstly your have wasted a lot of your time by posting this in the wrong forum. You should have tried DSP / Embeded forum for a much quick and better response, anyway here is what I think about them...

1) Before I write the Verilog code, I assume I need to test the algorithm using fixed-point numbers in Matlab, right?

Thats correct provided your are planning to have integer arithmetic in your FPGA (which is generally the case as integer arithmetic is less expensive to fabricate and even in terms of MHz consumed in computation and in terms of power consumed by the chip wrt floating point arithmetic).

2.) the 'real numbers' in MATLAB... (I guess this is a silly question for all you experts out there but I am a newbie so thank you for bearing with this)... if I do a straight forward conversion of "dec2bin" in MATLAB, it would give me a floating point number, right? is there a straight forward way to convert real numbers to fixed-point Q15 format in Matlab?

There are several questions here I shall take them sequencially...
Real numbers are floating point numbers stored in IEEE 754 notation in any x86 platform based software (in general the most common notation to represent a floating point number). You may refer to https://en.wikipedia.org/wiki/IEEE_floating-point_standard for more details.
dec2bin I am not sure as to what it does, but from the name it should convert an integer to hex representation (binary pattern) ... assuming this definition this function could return the following results if you pass a floating values
a) ZERO as it could not comprehend the notation
2) Binary value of the truncated integer part.
3) IEEE 754 notation of the floating point number.

Yes there is a straight forward way to convert floating point numbers to fixed point numbers
Firstly set the maximum bit for your integer part i.e choose the maximum possible floatin point number used in you computation say thats 11.3567812 ( I considering the absolute value so the range is bounded by -11.**** to +11.******) then look for the no.of bits used to storger integer data thats say 32 bits now the fixed point representation of 11.3567812 in a 32 bits fixed representation will be in Q27 format which will give you least error in fixed point computation.
11 needs 4 bits to represent
1 for the sign bit
so numbers of bits left for fraction is 32-4-1 = 27 hence Q27 format
NOTE: Fixed point representation will have an error of 1/2^(no.of bit in fraction +1)
as error.
As you are talking about Q15 format you will have to scale your constants to suit this representation.

3.) When implemented in FPGA later, at what stage will the conversion be done. i.e. does the number being fed to the board already have to be in the number format required or can the board settle that?

The answer to that has already come partly don't you think......I will tell you how..if its an algorithm then you will have to do the float to fixed convertion feed to your FPGA then do a fixed to float convertion on the output. If its a encoder (like an audio encoder) input is PCM samples which are already in Q-format (as they are quantized between +5V,+9V,+12V to -5V,-9V,-12V by the ADC hence they are already in -1 to +1 range as required by Q-format ) so go ahead with you FPGA computation and use the output staraight away.

Hope that was helpful without much confusion.
~Kalyan.

 

[hani nik]

verilog fixed to float

Hi Kalyan,
Thank you.
I thought this was a simple basic question that is trivial to all in the digital design world. I asked a few people I know but did not get a clear answer like yours and it had made me felt very stupid not knowing where to start! Looking in the wrong place isn't much help. And trying to tie different topics in a textbook is not easy.
Anyway, your reply is very good.

Thank you.

 

[kalyanram]

q15 format fixed point

Hi Hani,
Its always good to start somewhere...aleast as long as you make some progress anyway I was vexed by the fact that the question was unanswered for over a month..and had it been placed in the right place someone would have already given it a shot as the questions you posed are the ones one would tumble upon to begin with and buddy at some point of time everyone has been a newbie...now that you know the answers and probably by the end of your project would see through these fact and you are ready to take an any further questions in these areas..right..

~Kalyan.