May 30, 2013 #1 M mansoor64 Newbie level 2 Joined May 30, 2013 Messages 2 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,290 Hi every body Is if possible that cobvert a VHDL code(or ISE project) convert to a IP core in Xilinx ISE?
Hi every body Is if possible that cobvert a VHDL code(or ISE project) convert to a IP core in Xilinx ISE?
May 31, 2013 #2 achaleus Member level 5 Joined Dec 21, 2012 Messages 85 Helped 5 Reputation 10 Reaction score 5 Trophy points 1,288 Location Bangalore Activity points 1,866 question is not clear... by the way study flow to design a vhdl project.. you have to simulate for functionality ,synthesis to generate bit file which is used to map a real time logic on board
question is not clear... by the way study flow to design a vhdl project.. you have to simulate for functionality ,synthesis to generate bit file which is used to map a real time logic on board
May 31, 2013 #3 M mansoor64 Newbie level 2 Joined May 30, 2013 Messages 2 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,290 sorry I want convert my Xilinx ISE project to a IP core that only I/O pins located for other users, same the Xilinx IP core.is it possible?
sorry I want convert my Xilinx ISE project to a IP core that only I/O pins located for other users, same the Xilinx IP core.is it possible?