convert Floating point to fix point

hi,

I want to convert a small floating point number to a fix point in VHDL to show it in a 12 bit std_logic_vector signal. the number is .000244. if I use scalling method for that I can't convert it because after scaling it becomes 0.499468 and it's again a floating point number. how to resolve this issue?

thanks in advance

If this is for synthesis, then Altera and Xilinx produce floating point IP, both of which have fp/integer (and vice versa) conversion blocks.

For simulation - what format is this floating point value? if it is real type, you can simply scale the value by 2**12 and convert to an integer (then to SLV if you really have to):

my_12bit_slv <= std_logic_vector( to_unsigned( integer(0.00244*real(2**12)), 12) );

TrickyDicky said:

If this is for synthesis, then Altera and Xilinx produce floating point IP, both of which have fp/integer (and vice versa) conversion blocks.

For simulation - what format is this floating point value? if it is real type, you can simply scale the value by 2**12 and convert to an integer (then to SLV if you really have to):

my_12bit_slv <= std_logic_vector( to_unsigned( integer(0.00244*real(2**12)), 12) );

Click to expand...

thanks for reply, but it doesn't work again because std_logic_vector( to_unsigned( integer(0.00244*real(2**12)), 12) ) is less than 1 and it becomes 0.99918(however I used (0.00244*real(2**11) in the previous post because of signed number). In addition, I had some floating point numbers which I convert them with this method to fix number and I did some operation on them. now I want to compare the result of them with this value. I should be care about accuracy and I think this method doesn't work well. Do you have another suggestion?

If you need more accuracy, then you need more bits, or offset the input value more. And maybe try the fixed_pkg and float_pkg that are included in VHDL 2008.
You havent said what your goals are? real numbers are not synthesisable, so will not work in an FPGA. What are you actually trying to do?

I have some matrix which has floating point member I convert them to fix point with this method that I divide all of them with the largest number value of them and then I get all value between-1 to 1. then I multiply them with 2**(N-1)-1 whereas N is the number of bits that present this value as fix point. after this production I round new numbers and I get all of them as fix point numbers. I do some operation like multiplication on the matrix's and then I want to compare the result of them with this value (2.44*10^(-4)). because of the value (2.44*10^(-4)) is also a floating point I decide to convert it as previous value to a fix number. the issue is my matrix results are 12 bits and when I want to convert 2.44*10^(-4) to 12 bit it becomes less than 1. I don't know how to fix this problem?

Usually, the easy way to deal with this is just multiply (or divide) by 2^n. I just moves which bits are integer bits and which are fraction bits.

0.000244 * 2^12 = 0.999424

So why not mutiply by 2^18?
= 63.9631

And just keep it as 12 bits? then you have 6 integer bits and 6 fraction bits (and hence fixed point).

linam said:

hi,

I want to convert a small floating point number to a fix point in VHDL to show it in a 12 bit std_logic_vector signal. the number is .000244. if I use scalling method for that I can't convert it because after scaling it becomes 0.499468 and it's again a floating point number. how to resolve this issue?

thanks in advance

Click to expand...

I worked with floating points in few projects before in VHDL and it's all synthesizable. Do you have the following libraries By David Bishop (dbishop@vhdl.org) with you?
fixed_float_types_c.vhdl - Types used in the fixed point and floating point package
fixed_pkg_c.vhdl - Fixed-point package (VHDL-93 compatibility version)
float_pkg_c.vhdl - Floating-point package (VHDL-93 compatibility version)
These files should be compiled into a library called “ieee_proposed”.
They provide various functions for conversion.
Why do you have to convert to std_logic_vector to compare? When you can compare them in floating point. You can do all the operations in floating points also and it is better. Why do you have to convert to fixed point?