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Convergence Problems :
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Convergence problems can be the most perplexing aspect of performing a simulation. There is a methodology that comes with experience. This secton of the text will provide a structured attack that should cure most convergence problems. The convergence suggestions should be performed in the order that they are listed. They are prioritized manner that should be of the most benefit. Begin with the obvious.
Common mistakes:
- Verify that all circuit connections are valid, proper component polarity, and a DC path from every node to ground. RENET, or REDRAW.
- Verify that all components have the correct values (i.e. MEG instead of M(milli) for 1E6). Components with no assigned value may be set to a default value determined by the simulator.
- Verify that all model parameters are realistic; especially if the model was created or altered by you.
- Verify that every node has two connections.
- Verify that voltage or current generators have the correct syntax and appropriate values.
- Use a series equivalent in place of capacitors or current sources that are placed in series.
- Verify that the letter zero was not used in place of zero (0).
- If B elements are used in the circuit, verify that division by zero cannot occur.
- Verify that dependant source gains are correct.
DC Convergence Solutions :
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-Set ITL1= 400 in the . OPTIONS statement.
-This setting increases the number of iterations that SPICE will perform before generating a none convergence warning and aborting the simulation.
Add .NODESETs.
Voltages can be assigned to the nodes of the top level schematic. The initial guess made by SPICE to determine the DC bias point incorporates the nodsets. This can greatly reduce the number of iterations required to converge, increasing the probability of a simulation converging. Improper nodesets can result in inaccurate results. Care should be taken in setting the .NODESET statements.
- Use pulse statements to turn on DC power supplies
Example: V1 3 0 5 DC
Becomes: V1 3 0 PULSE 0 15
This allows the user to turn on the power supplies. A rise time may also be used to provide a realistic turn on.
Set Gmin in the .OPTIONS statement.
Set GMIN=1n, or GMIN=1u. This sets the minimum conductance across all semiconductor devices.
Set RSHUNT in the .OPTIONS statement.
This option places a resistor, with the value assigned globally by RSHUNT, from every node in the circuit to ground. A solution obtained using this convergence technique could be made at an incorrect operating point. The solution should be carefully examined.
Set ILT6=100 in the .OPTIONS statement.
Source stepping decreases all of the DC stimulus until a DC bias point is determined, or they are reduced to zero volts. The voltages are then gradually stepped from the DC bias point that converged, which may be at ground, back to the assigned value. The source stepping algorithm uses gradual increases in voltage, to establish a new DC bias point, using the previous DC bias point as the initial guess. This process continues until a DC bias point has been establish for the assigned values of the stimulus of the circuit.
Transient Convergence Solutions :
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Verify that DC convergence has been achieved.
View the error statements in the text editor to verify that that the convergence problem pertains exclusively to the transient simulation.
Verify that the time step provides an appropriate resolution.
The time step must be small enough to provide appropriate resolution of the switching waveforms generated by the simulation. The time step should be assigned to an order of magnitude smaller than the shortest period in the simulation. For example, in a 100KHz oscillator the period is 10uSec. The time step should be set to 1uSec.
.TRAN 1u 3m
Other factors such as the on time or the duty cycle should be considered when determine the time step. Once convergence has been achieved this value can be maximized to reduce simulation time.
For oscillating or switching circuits, set METHOD=GEAR in the .OPTIONS statement.
This statement selects the type of integration method that SPICE uses to solve the
transient equations. Gear integration should be used for all switching circuitry.
The default integration, trapezoidal, has a tendency to produce oscillations.
Add UIC (Use Initial Conditions) to the .TRAN statement.
This statement causes SPICE to bypass the DC operating point analysis. Initial conditions should be placed on capacitors at there expected operating voltage. Just as with the use of nodesets, initial condition statements can produce incorrect solutions. Results should be verified for validity.
Set ITL4=500 in the .OPTIONS statement.
This statement increases the number of iterations performed by SPICE, before a nonconvergence warning is issued and the simulation is aborted.
Set RELTOL=.01 in the .OPTIONS statement.
This statement decreases the accuracy of the simulation by increasing the relative error tolerance required for convergence. This statement should not be set lower than .01. The simulation run time is also reduced by increasing RELTOL. As a general rule, every order of magnitude decrease of the relative tolerance results in doubling the simulation run time.
Reduce the rise and fall times of PULSE sources.
Drastic changes in voltage can result in nonconvergence problems. Soften the edges of the pulse source by increasing the rise time and fall time of the pulse waveform.
Set TRTOL=40 in the .OPTIONS statement.
This statement is proportional to the step size used when performing a transient simulation. The accuracy of the simulation can be compromised by changing the TRTOL from the default of setting of TRTOL=7.
Reduce the accuracy of ABSTOL/VNTOL if current and/or voltage levels permit.
The default value of ABSTOL=1pA, and VNTOL=1uV, should be set to about eight orders of magnitude below the level of the maximum current and voltage.
Set the RAMPTIME=10nS in the .OPTIONS statement.
This statement ramps all independent sources up from zero at the beginning of the transient analysis. This statement is beneficial if the transient analysis will not begin. Take care to allow enough time for sources to ramp up, otherwise this statement could do more harm than good.
AC Convergence Solutions :
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Do not use steps 3-5 of the DC convergence solutions.
Using these steps may not produce a valid DC operating point, which is essential for SPICE to linearize the circuit. See the AC analysis description. Once DC convergence is achieved, the AC analysis will also converge.
Convergence failures are not always a function of SPICE, and can not be fixed using .OPTIONS statements or other convergence techniques. Convergence failures may result from hardware problems.
If the problem really is numerical convergence and not circuit design
I find adjusting GMIN to be a good first step (solving around half of these types of problems) :
This is a leakage resistance for reverse biased semiconductor junctions (for example diodes), and lower values make the circuit look more and more like a network of resistors (which will always solve). But this is at the expense of accuracy. values above 1E-9 can give fairly meaningless results.
Depending on the simulator you are using this may or may not make a huge difference - SPICE3F5 for example, will try what is called GMIN stepping if at first the circuit will not converge. This means that a large GMIN is used to find an initial solution, and the value is then ramped back to its original value in order to maintain accuracy. Not sure how PSPICE,XSPICE etc. handle this.
From options and description given above, I would say the simulator he uses is P-CAD, or PROTEL (both from ALTIUM), so simulation engine is SPICE3f5/Xspice. (XSPICE for those who are new, is an extended SPICE event-driven wich is more suitable in order to simulate digital devices, opposite to SPICE3f5 which is not event-driven).
GMIN in P-CAD has a default value of 1.0e-12mhos (conductance). Raising this value will help with convergence at expense of accuracy.
For Transient analysis you can establish not zero meaning of node capacity CMIN.
Also it is useful for the preliminary account of capacity of interconnections.
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