bsrin
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Hi everybody,
In tsmc DRM , I have seen that minimum spacing between contact and gate at source or drain of transistor(RC clamp) should be 0.15um while for normal transistor it is 0.1um . What would be the reason for asking more spacing for esd devices.
Thanks in advance.
In tsmc DRM , I have seen that minimum spacing between contact and gate at source or drain of transistor(RC clamp) should be 0.15um while for normal transistor it is 0.1um . What would be the reason for asking more spacing for esd devices.
Thanks in advance.