In ADC design, where should I connect the AGND and DGND. For example, the S/H block which is powered by analog supply must be driven with a digital clock so there two grounds must talk somewhere on chip to have a return current path right? Or we just rely on the assumption that AGND and DGND potentials are relatively close to each other and are connected somewhere outside the chip?
Ferrite bead isolation is done off-chip and is used to equalize the two dc ground potentials but keep the noise away right? So when the digital clock is switching the S/H, where will the return current path be?
It depends of your layout. In any case the connection should be done shortly to pins of the ADC. If you want more detailed answer, please post your layout.