Conditions for switching FET

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J176 is a signal switch, often used e.g. for audio signal switching.

I'm not sure which info you are spefically missing. What's your application?

By nature of the PJFET, it's on with zero gate voltage and off with positive gate voltage > Vth, max Vth value is 4V with J176. The driver circuit should avoid foward biasing of the gate junction, that's often achieved with a resistor-diode comibination.
 

My application of using the JFET is that I want to sense my battery voltages through voltage divider and then reading those voltage through the ADC of my micro controller, as voltage divider will give me the voltage's continuously so in order to control my divider, I had used JFET as a switch, I am providing Vgs of 3.3V to cutoff the voltages on the divider and 0V to get my voltage on the divider but the JFET is not switching my voltages, below is my circuit diagram:



Awaiting positive reply
 

A lot of guesses could have been avoided with this circuit in your initial post.

To turn off the PJFET, the gate voltage must be 4V greater than Vbat, which is obviously impossible with a processor output pin. For gate voltage below, Vbat, the drain-gate is forward biased.

In a brief, a PJFET isn't suited for this application. A PMOSFET (enhancement mode) can work under certain circumstances, for a general solution (wide battery voltage range) a level shifter for the gate voltage is still required.

A battery voltage measurement circuit is usually allowed to sink a small current from the battery during operation, so a level shifter can be supplied by Vbat. See below a circuit with a level shifter for a switched battery measurement using a BJT as analog switch.

 

read the "high speed mosfet gate drive" article by Laszlo balogh...that mightn't be the exact name of the article but it answers about switching fets..I presume you mean for SMPS use?
 

read the "high speed mosfet gate drive" article by Laszlo balogh...that mightn't be the exact name of the article but it answers about switching fets..I presume you mean for SMPS use?
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I agree that the title reminds to SMPS application, but read post #6 to see that the problem is completely different.
 

thanks, as you later replied yourself , OP shouldn't be using JFETs in essence.
I've never used a JFET. Always BJT or mosfet was right for it, whether signal or power
 

JFETs have some advantages as analog switches, e.g. they can handle AC voltages with respective gate bias, MOSFET can handle AC voltage too, but only if the substrate is separately connected, which isn't the case with any popular discrete MOSFET.
 
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So why it is written in a datasheet that the J176 will cutoff on maximum of 4 volts.Suppose if I substitute my JFET with PNP transistor it will cutoff on 4.4V if 5V supply is provided on the collector terminal bcz its designed for high side switching so why my p-channel isn't doing the job for me since they are also designed for the same purpose.

Waiting for your positive reply thanks.
 

PJFET cutoff voltage is positive against source terninal. Your circuit in post #6 doesn't achieve the necessary cutoff voltage, which is 4V above Vbat.
 

Thanks @FvM I have checked my circuit and you are right it operates in cutoff mode when Vgs=Vgs(off)max + Vbat is provided, But need to know why we have to give 4V above Vbat?
 

why we have to give 4V above Vbat?
Click to expand...
That's how a PJFET works. It's source is connected to Vbat. Consider that the more positive channel terminal acts as source, not the nominal one.
 

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