Compensation of OPAMPS

[Ravinder487]

I've very basic question regarding compensation of OPAMPS.In CMOS Analog Circuit design by Allen & Holberg it was given that if RHP zero is ten times greater than GB then it doesn't effect OPAMP stability.In the next topic he explains how to control RHP zero.
My doubt is if we have satisfied first condition then what is the necessary of controlling zero location and if it is necessary then how can we know which method is to be used to control zero location as there are many methods listed in the book.
Thanks & Regards,
Ravinder Jakkidi

 

[vrkrao]

I've very basic question regarding compensation of OPAMPS.In CMOS Analog Circuit design by Allen & Holberg it was given that if RHP zero is ten times greater than GB then it doesn't effect OPAMP stability.In the next topic he explains how to control RHP zero.
My doubt is if we have satisfied first condition then what is the necessary of controlling zero location and if it is necessary then how can we know which method is to be used to control zero location as there are many methods listed in the book.
Thanks & Regards,
Ravinder Jakkidi

Ravinder,
The RHP zero basically stems from the cap introduced for compensation. Take the case of a simple 2 stage CMOS op-amp, when a cap is introduced between first and second stages to compensate, the transfer function will have a zero in it. This zero can be close or within the BW of your op-amp if not properly designed. What happens because of this is, that gain curve starts dropping from the first pole, you would want this to cut the unity gain before the gain curve sees a zero. Then, you would have phase at gain-cross-over frequency as less than 180. Thereby your Phase-margin is +ve. Now, if a zero shows up before the gain curve hits the gain-crossover, then the gain curve flattens because of the zero and this will be a problem for phase-margin. Now, if the zero is situated way beyond as you said, by then, at the frequency, the gain is already negative and no question of it affecting your phase-margin.
Now, coming to the method employed to eliminate it, easiest way to do it is to introduce a resistor in series with the Cc. The resistor value should be 1/gm of the second stage's driver transistor's gm. This will place the zero at infinity (ideally). if R is > 1/gm, then RHP will move to LHP then also, it is not a prob. Hope this helps.

-Ramki.

 

[leo_o2]

Yes, if RHP (and any pole or zero) is ten times greater than GB, its influence on stability is neglectable.
So it don't need to take care of very high frequency RHP.

 

[shawnup]

Ravinder,
The RHP zero basically stems from the cap introduced for compensation. Take the case of a simple 2 stage CMOS op-amp, when a cap is introduced between first and second stages to compensate, the transfer function will have a zero in it. This zero can be close or within the BW of your op-amp if not properly designed. What happens because of this is, that gain curve starts dropping from the first pole, you would want this to cut the unity gain before the gain curve sees a zero. Then, you would have phase at gain-cross-over frequency as less than 180. Thereby your Phase-margin is +ve. Now, if a zero shows up before the gain curve hits the gain-crossover, then the gain curve flattens because of the zero and this will be a problem for phase-margin. Now, if the zero is situated way beyond as you said, by then, at the frequency, the gain is already negative and no question of it affecting your phase-margin.
Now, coming to the method employed to eliminate it, easiest way to do it is to introduce a resistor in series with the Cc. The resistor value should be 1/gm of the second stage's driver transistor's gm. This will place the zero at infinity (ideally). if R is > 1/gm, then RHP will move to LHP then also, it is not a prob. Hope this helps.

-Ramki.

Ramki,
Thanks for your explanation for compensation of 2-stage Omp. And I want to know the compensation of other Omp architectrues, such as telescopic and folded cascode. Hope for your help.
Thanks & Regards
Shawn

 

[leo_o2]

If telescopic and folded cascode opamp is used as unit-gain buffer, a single big capacitor is connected at the output node will have enough compensation. Single stage opamp just provide a high impedance output and single pole. It will form a low-frequency pole. If some parasite poles influence the phase margin, a series resistor can be connected as the figure below.

 

[Ravinder487]

If the second stage of OTA is cascode amplifier then what should be the value of Compensation capacitor,will it depend upon Load capacitance where do I need to place.
Here is the schematic..

 

[leo_o2]

For you circuit, I suggest miller compensation. Pls try a capacitor or a capacitor+resistor connecting between "out" and "inter".
It is two-stage amplifier.

 

[Ravinder487]

can you explain why Miller compensation still works for this configuration as the second stage is cascode amplifier!!

 

[leo_o2]

Please check miller effect principle. In my opinion, miller effect is not related to if there is cascode gain stage or not.