Comparing differential signals without comparator

[Tajira]

I am using lattice Crosslink FPGA. I am getting two analog signals on two differential pins( on a differential pin pair). I need to compare them in order to generate a comparator signal. Due to less resources available on FPGA I am pushed to find some innovative solution for this situation. Is there any way I may compare these signals without using built-in ADC based comparator? Any electronic technique?

 

[crutschow]

I need to compare them in order to generate a comparator signal.

Exactly what is to be the output from this comparison?

 

[danadakk]

Use a programmable SOC (System on Chip) with mixed signal in it and
programmable logic in it ?

Like this one chip part, components shown in it, multiple copies in most
'cases, and ability to create cust5om components of your own using schematic
capture and / or Verilog.... User have cxreated other libs of components to add
to its drag and drop catalog, like DDS, PLD, LUTs, Cordic, 74HC equivalents.....

Here is a simple example of what can be done and used a small amount of its resources :

Test Bed DDS and WaveDAC burst tool

Occasionally I need to generate custom wave forms and burst a known number of cycles into a DUT. This is a single chip solution, board I typically I use is $ 10. You just drag and drop components onto schematic, wire internally with a wire wizard tool and out to pins, right click and config...

www.edaboard.com

Folks have made single chip oscilloscopes with it.....


Regards, Dana.

 

[D.A.(Tony)Stewart]

You cannot compare 2 analog values with digital gates unless you can vary the threshold of both gates and sweep the logic outputs while ramping the threshold.
Unfortunately, the assumption is not possible so a diff. amp with a suitable CM range is needed.

 

[Tajira]

Exactly what is to be the output from this comparison?

Essentially low and high i.e. one will be ref negative(or low, but constant voltage) other will be varying input signal.

 

[D.A.(Tony)Stewart]

no luck, you need a comparator

 

[FvM]

A differential input, e.g. LVDS pin pair can be used as kind of comparator with limited accuracy. But you didn't yet mention accuracy requirements. You should also consider the limited common mode range.

 

[danadakk]

This is a stretch idea, probably not workable, but I will jump off a cliff ....

All CMOS inputs have a threshold. One could implement a PWM, then filter it, to
get a DC value. Then apply that to an input of interest, use code, and determine
the PWM value, hence DC value, the input trips at. Additionally one could use
a simple inverter stage, strap internal across it a high valued R, which biases
it up into a linear amplifier stage, "linear" used loosely as an adjective. And use that
as a G stage if needed. So at this point you have an input that trips at a value determined
by PWM, eg a sloppy comparator. Implement two of these stages. That allows phase
determination.

Obviously there are a number of T and V and noise issues and I am sure other issues to deal with.

Just a thought.......

Note you have not mentioned freq content of input signals.

Regards, Dana.

 

[D.A.(Tony)Stewart]

The common mode range of the receiver is +0.2V to +2.2V, and the recommended receiver input voltage range is from ground to +2.4V

 

[BradtheRad]

Wheatstone bridge is the basic method to make comparisons. The challenge is to detect which way current flows through the bridge no matter how small is current. A long-tail pair is commonly used to do so.

 

[Tajira]

This is a stretch idea, probably not workable, but I will jump off a cliff ....

All CMOS inputs have a threshold. One could implement a PWM, then filter it, to
get a DC value. Then apply that to an input of interest, use code, and determine
the PWM value, hence DC value, the input trips at. Additionally one could use
a simple inverter stage, strap internal across it a high valued R, which biases
it up into a linear amplifier stage, "linear" used loosely as an adjective. And use that
as a G stage if needed. So at this point you have an input that trips at a value determined
by PWM, eg a sloppy comparator. Implement two of these stages. That allows phase
determination.

Obviously there are a number of T and V and noise issues and I am sure other issues to deal with.

Just a thought.......

Note you have not mentioned freq content of input signals.

Regards, Dana.

Signal durations(or lets say the time in which we will really observe and take decision will be around 900ns long)