Common Mode Feedback in ADC

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moisiad

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Hi,

I am implementing a 8 bit ADC in 1V. In the Opamp i design (A two stage folded cascode), i have made the Common Mode Feedback (CMFB) by means of a simple two resistor network sensing the outputs, which seems to operate well (besides its simplicity) and keep the output in the desired DC level (0.5V). Also the input CM will be at 0.5V

However when doing corner analysis the output CM level varies. Is this going to have a bad effect on the ADC performance?

If yes, how can i solve it. By using a CMFB circuit with external reference voltage as a CM level? And this CMFB circuit has to be continuous or discrete time.

Thanks
 

I think that using resistor network as feedback to common mode feedback in adc, there are two problem:
1. resistor network decrease the output resistor, then decrease the gain of opamp
2.when the output swing range is large, the opamp of common feedback maybe leave his saturion dc point.
 

Both of the problems that you refer are not visible in my simulations.
The gain remains in satisfied levels (for my case more than 60db) and the transistors operate in saturation.

Thank you for your remark
 

Switched Cap. CMFB is the perfect solution specially if u r designing dicrete time A/D.

BEST!
 

I agree with SC, it's a current solution.
 

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