seeya
Newbie level 5
We have heard the commotion over SystemC and an evolved Verilog. The IEEE 1364 Verilog committee has a plan to specify next-generation Verilog: 1364-2005. Verilog 2005 will be based on input from vendors (e.g., Cadence Design Systems, which made several donations to IEEE 1364 this month), users (the worldwide Verilog community) and industry associations (such as Accellera, whose SystemVerilog 3.1 is slated for donation to IEEE in the near future).
Similarly, Open SystemC International has a well-formulated plan to standardize SystemC 2.1 via IEEE and will follow that up with further open-community work to evolve the language based on user needs.
Similarly, Open SystemC International has a well-formulated plan to standardize SystemC 2.1 via IEEE and will follow that up with further open-community work to evolve the language based on user needs.
