coarse tuning for LC VCO question

Status
Not open for further replies.
K

kumite

Junior Member level 1
Joined
Jun 6, 2012
Messages
15
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
Egypt
Visit site
Activity points
1,383
i am designing LC VCO (1.4G-->2.2G) with a capacitor bank (coarse tuning) and i need any tutorial or reference or papers on how to design the capacitor bank ,i read a lot of papers from IEEE but all i found was about enhancements or modifications and nothing help me to start.
Any help would be appreciated.
Thanks in advance.
 

are you designing a microstrip oscillator, or an IC chip?

The bigest problem in such things are the parasitic reactances related to the structure. you need some sort of active device (FET or PIN diode) to switch in/out each capacitor, and those devices also require a biasing scheme. All of these things lead to a total reactance vs. frequency that is more complicated than a simple fixed capacitor--so that all has to be analyzed properly.
 

it's an IC chip oscillator and yes all the problem is about the parastics that the switches will add which will degrade the performance and the quality factor
 

I'm not a chip designer, but I would guess that some sort of bank of FETs with their sources to ground and their drains to the different capacitor values would work best. You can turn on/off each capacitor with the gate voltage--eliminating the need for bias networks. Keep everything laid-out very tightly, no long line lengths.
 
Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…