That's a somewhat different description of "coarse grain" than what I've read. Most references suggest that Xilinx and A.ltera FPGAs are basically fine grain devices because their logic fabric is bit-level configurable, whereas coarse grain devices would be word-level configurable. Yes, the multipliers, block RAMs, and other large features in modern FPGAs could be considered coarse grain, but those are relatively sparse features. Most of the FPGA logic fabric is still fine grain.
Instead of discussing the fuzzy terms "coarse grain" and "fine grain", can you describe what types of test benches you wish to see? And do you really mean "test benches", because test benches are typically used only during simulation, and are not implemented in the target hardware.