Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

CMRR calculation for an op-amp

Status
Not open for further replies.
B

bsrivastava

Member level 2
Member level 2
Joined
Sep 9, 2005
Messages
48
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,288
Activity points
1,701
All,
I need help me in testbench for CMRR calculation for an op-amp.
I shorted the input with DC bias and gave common AC. Until certain
freq the CM gain (Acm) is in fraction (output is less than input).
From the definition of CMRR = 20log (Adiff/Acm), which is
20log Adiff - 20 log Acm = +ve value - (-ve value) = big +ve value
seems unrealistic to me.

Thanks
 

calculation of cmrr

cmos analog circuit design
allen
P313
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top