CMOS realization of NAND and XOR in xilinx

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miracle123

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Can you plz help me to implement NAND and XOR using CMOS in xilinx? How can I measure the amount of power these gates consume?

plz help.
 

....to implement NAND and XOR using CMOS in xilinx?

you cannot implement NAND and XOR "using CMOS" in xilinx.
 
You can do only the logic design in xilinx... not the transistor level design... You have to use Cadence for CMOS level designing.
 
Thanks for your reply.
How can I use the VHDL of NAND and XOR in xilinx to measure the power it consumes/ dissipates ? Can you plz tell me in detail? I am a beginner of xilinx, just installed it in my pc.
 

miracle123 said:
Thanks for your reply.
How can I use the VHDL of NAND and XOR in xilinx to measure the power it consumes/ dissipates ? Can you plz tell me in detail? I am a beginner of xilinx, just installed it in my pc.
Click to expand...

Xilinx project navigator would only give you the estimate of power consumption in FPGA. Just build a project and using the verilog design.. after synthesizing and implementing the code, you will get an access to the design summary which contains all the information you need.For more info, read the xilinx user guide found in help tab.
 
If you setup NAND or NOR gates in programmable logic, the observed dynamic power dissipation won't have much to do with the basic logic operation, it's mainly consumed in I/O cells. Also the CPLD method of representing logic is quite different from native CMOS transistor logic.
 


I have successfully built the project as well as synthesized and implemented it. Now I have got the design summary. But I haven't got the info about power consumption. Can you plz help ?
 

go to start menu ...xilinx .>>...accesorries>>>..xpower analyser...add ur program..chk the power summary
 

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