CMOS process of Low,High,Reguar,Zero Vt

[myem]

low vt process

about CMOS process
what is the differenct of Low,High,Reguar,Zero Vt ?

thanks

 

[rfsystem]

The threshold voltage of the MOS is defined by different implants. In some processes the zeroVt is only avaible for NMOS or PMOS.

For digital MOS reducing the threshold makes the circuit faster but increases the leakage current. The ZeroVt does not switch off anyway.

Some analog circuits could be better build with zeroVt.