Oct 22, 2004 #1 K kunalb Newbie level 3 Joined Oct 22, 2004 Messages 3 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 10 i need to design a cmos latched comparator. So can anyone tell me any useful links or books for this.
i need to design a cmos latched comparator. So can anyone tell me any useful links or books for this.
Oct 22, 2004 #2 S sunking Advanced Member level 3 Joined May 25, 2004 Messages 873 Helped 70 Reputation 140 Reaction score 23 Trophy points 1,298 Activity points 6,283 you can refer to:CMOS analog circuit design, P492 to P600 the book can be found in this forum
Oct 22, 2004 #3 Fom Advanced Member level 2 Joined Mar 10, 2004 Messages 630 Helped 84 Reputation 168 Reaction score 34 Trophy points 1,308 Location Taiwan Activity points 4,463 Why you can't use combination of comparator and latch? I think the latched comparator is just that.
Oct 22, 2004 #4 B borodenkov Full Member level 2 Joined Mar 2, 2004 Messages 127 Helped 15 Reputation 30 Reaction score 4 Trophy points 1,298 Activity points 1,264 it is basically a preamplifer, decision circuit (positive feedback latch) and a RS latch to keep teh result. Look in Davis&Martin or Baker/Lee/Boyce CMOS or Maloberti's book or any other book about analog CMOS..
it is basically a preamplifer, decision circuit (positive feedback latch) and a RS latch to keep teh result. Look in Davis&Martin or Baker/Lee/Boyce CMOS or Maloberti's book or any other book about analog CMOS..
Jan 6, 2005 #5 K kkoko Junior Member level 2 Joined Dec 7, 2004 Messages 22 Helped 1 Reputation 2 Reaction score 1 Trophy points 1,283 Activity points 168 you can see in book Johnson
Jan 6, 2005 #6 C chinito Full Member level 2 Joined Jul 5, 2004 Messages 128 Helped 11 Reputation 22 Reaction score 6 Trophy points 1,298 Activity points 1,204 latched comparator has 3 stages: 1) Preamplifier (diode connected load is the norm, does V --> I conversion) 2) decision stage (+ve feedback employing latch, senses I) 3) Output stage (CSDA Complementary Self Biased Diff Amp) CDSA is then followed by two inverters to give you clean digital output. Read P Ellen, Johns and Martin for details.
latched comparator has 3 stages: 1) Preamplifier (diode connected load is the norm, does V --> I conversion) 2) decision stage (+ve feedback employing latch, senses I) 3) Output stage (CSDA Complementary Self Biased Diff Amp) CDSA is then followed by two inverters to give you clean digital output. Read P Ellen, Johns and Martin for details.
Aug 4, 2005 #7 T tecsiun Newbie level 5 Joined Aug 20, 2004 Messages 8 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 118 preamp + regenerative sense amplifer