CMOS latched comparator design

[kunalb]

i need to design a cmos latched comparator. So can anyone tell me any useful links or books for this.

 

[sunking]

you can refer to:CMOS analog circuit design, P492 to P600
the book can be found in this forum

 

[Fom]

Why you can't use combination of comparator and latch? I think the latched comparator is just that.

 

[borodenkov]

it is basically a preamplifer, decision circuit (positive feedback latch) and a RS latch to keep teh result.

Look in Davis&Martin or Baker/Lee/Boyce CMOS or Maloberti's book or any other book about analog CMOS..

 

[kkoko]

you can see in book Johnson

 

[chinito]

latched comparator has 3 stages:

1) Preamplifier (diode connected load is the norm, does V --> I conversion)
2) decision stage (+ve feedback employing latch, senses I)
3) Output stage (CSDA Complementary Self Biased Diff Amp)

CDSA is then followed by two inverters to give you clean digital output. Read P Ellen, Johns and Martin for details.

 

[tecsiun]

preamp + regenerative sense amplifer