cmos fabrication (layouts)

Status
Not open for further replies.
A

aishu.r

Newbie level 2
Joined
Sep 8, 2012
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,291
hi,

I too have a similar question. Anyone please help.

Why do we have nwell at n-substrate? if it is for reducing leakages, we have pselect there. then whats the need for nwell.

please tell me in detail. i am getting confused.
 

As far as i know.. We can use both nwell n pwell. But when we are working on TSMC, we go for nwell. What is the exact purpose of using nwell.

Please answer my question.
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…